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unintended pulses from devices such as mechanical switches, and is therefore most suited to take input
from electronic sensors etc. that generate single wire pulses.
Only the underflow (UF) and overflow (OF) interrupt flags are set in this mode.
22.3.1.3 Externally Clocked Quadrature Decoder Mode
This mode is enabled by writing EXTCLKQUAD (0x3) to the MODE field in PCNTn_CTRL and disabled
by writing DISABLE (0x0) to the same field. The external pin clock source must be configured from the
registers in the CMU, (Chapter 11 (p. 92) ).
Both edges on PCNTn_S0IN pin are used to sample PCNTn_S1IN pin to decode the quadrature code.
Consequently, this mode does not depend on the internal LFACLK and may be operated in EM3. A
quadrature coded signal contains information about the relative speed and direction of a rotating shaft
as illustrated by Figure 22.2 (p. 311) , hence the direction of the counter register PCNTn_CNT is
controlled automatically.
Figure 22.2. PCNT Quadrature Coding
Clockwise direction
Reset
1 cycle/sector, 4 states
00
10
11
01
PCNTn_S0IN
PCNTn_S1IN
PCNTn_CNT
0
0
1
2
Counter clockwise
direction
1 cycle/sector, 4 states
00
01
11
10
PCNTn_S0IN
PCNTn_S1IN
PCNTn_CNT
0
0
PCNTn_TOP
PCNTn_TOP-1
X = sensor position
If PCNTn_S0IN leads PCNTn_S1IN in phase, the direction is clockwise, and if it lags in phase the
direction is counter-clockwise. Although the direction is automatically detected, the detected direction
may be inverted by writing 1 to the EDGE bit in the PCNTn_CTRL register. Default behavior is illustrated
The counter direction may be read from the DIR bit in the PCNTn_STATUS register. Additionally, the
DIRCNG interrupt in the PCNTn_IF register is generated when a direction change is detected. When a
change is detected, the DIR bit in the PCNTn_STATUS register must be read to determine the current
new direction.
Note
The sector disc illustrated in the figure may be finer grained in some systems. Typically,
they may generate 2-4 PCNTn_S0IN wave periods per 360° rotation.
2011-04-12 - d0001_Rev1.10
311
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